1. Technical Field
The present invention relates to a semiconductor memory apparatus, and more particularly, to a precharge apparatus which can stably maintain a voltage of a local input/output line in a semiconductor memory apparatus.
2. Related Art
Increased frequencies used in semiconductor memory apparatuses result in a concurrent operation speed is increased accordingly. Here, a time required for precharging a local input/output line is a determinant of the operation speed of the semiconductor memory apparatuses. For example, as a read command is applied in a read operation, and a column selection signal becomes active, cell data amplified by a bit line sense amplifier is transmitted to the local input/output line. Subsequently, as the column selection signal becomes inactive, the local input/output line is precharged. Accordingly, when the read commands are successively inputted, the local input/output line needs to perform a develop operation and a precharge operation by turns. In this case, a precharge level of the local input/output line has a great effect on speed and frequency characteristics.
That is, if previous data is not rapidly precharged during data reading, reliability for data to be read next cannot be ensured. This problem becomes more significant during a gapless operation.
FIG. 1 is a schematic view of a semiconductor memory apparatus to which the present invention is applied.
A typical semiconductor memory apparatus 100 includes a memory cell array 110 which has a plurality of memory cells arranged in a matrix shape, a bit line sense amplifier 120 which senses and amplifies a difference between voltages applied to a bit line BL and a bit line-bar BLb of the memory cell array 110, a column selection circuit 130 which selects a specific column of memory cells in response to an address selection signal input from the outside, an input/output sense amplifier 140 which senses and amplifies a voltage difference between data transmitted to a local input/output line LIO and a local input/output line-bar LIOb through the column selection circuit 130, a multiplexer (MUX) 150 which selects data sensed and amplified by the input/output sense amplifier 140 and then transmitted through global input/output lines GIO and GIOb, and an output buffer 160 which outputs data selected by the multiplexer 150. A precharge apparatus 170 is connected to the local input/output line LIO and the local input/output line-bar LIOb. During a precharge operation, the local input/output lines LIO and LIOb are precharged to prescribed levels by the precharge apparatus 170.
FIGS. 2 and 3 are diagrams showing an example of a typical precharge apparatus.
FIG. 2 shows a case where the precharge apparatus 170 has P-type MOS transistors. The precharge apparatus 170 includes a first P-type MOS transistor P1 which is connected between the local input/output line LIO and a bit line precharge voltage input terminal VBLP, a second P-type MOS transistor P2 which is connected between the bit line precharge voltage input terminal VBLP and the local input/output line-bar LIOb, and a third P-type MOS transistor P3 which is connected between the local input/output line LIO and the local input/output line-bar LIOb. Each of the first to third P-type MOS transistors P1, P2, and P3 is driven by a local input/output line precharge-bar signal LIO-PCGb.
FIG. 3 shows a case where the precharge apparatus 170 has N-type MOS transistors. The precharge apparatus 170 includes a first N-type MOS transistor N1 which is connected between the local input/output line LIO and the bit line precharge voltage input terminal VBLP, a second N-type MOS transistor N2 which is connected between the bit line precharge voltage input terminal VBLP and the local input/output line-bar LIOb, and a third N-type MOS transistor N3 which is connected between the local input/output line LIO and the local input/output line-bar LIOb. Each of the first to third N-type MOS transistors N1, N2, and N3 is driven by a local input/output line precharge signal LIO-PCG.
In the precharge apparatuses shown in FIGS. 2 and 3, during the gapless operation, the precharge levels of the local input/output lines LIO and LIOb are dropped due to load capacitance generated at the gate terminals of the MOS transistors. In particular, in the precharge apparatus shown in FIG. 2, since the P-type MOS transistor has lower driving capability than the N-type MOS transistor, worse characteristics appear, regardless of the same gate size. Furthermore, if the channel width of the transistor is increased in order to improve the driving capability of the P-type MOS transistor, gate capacitance may be increased and the layout may be made large.
FIG. 4 is a diagram illustrating a voltage dropping phenomenon of a local input/output device in a semiconductor memory apparatus to which a typical precharge apparatus is applied.
As shown in FIG. 4, the local input/output line precharge signal LIO_PCG or the local input/output line precharge-bar signal LIO_PCGb is enabled to a low or high level during the active operation. Then, potentials of the local input/output line LIO and the local input/output line-bar LIOb are developed by the input/output sense amplifier 140, such that data is sensed. Furthermore, the local input/output line precharge signal LIO_PCG or the local input/output line precharge-bar signal LIO_PCGb is enabled to a high or low level during a local input/output line precharge operation, and then the local input/output lines LIO and LIOb are precharged to the bit line precharge voltage VBLP.
When the active operation and the precharge operation are repeated in the gapless operation, the voltage levels of the local input/output lines LIO and LIOb instantaneously rise or fall due to the coupling phenomenon generated in the MOS transistors constituting the precharge apparatus each time the input/output precharge signal is changed. The coupling noise has an effect on the bit line precharge voltage terminal VBLP. Accordingly, as the operations are repeated, the precharge levels of the local input/output line LIO and the local input/output line-bar LIOb may gradually drop. As a result of the repeated precharge operations, the voltages of the local input/output line LIO and the local input/output line-bar LIOb may drop lower than the bit line precharge voltage VBLP.
As such, if the precharge voltages of the local input/output line LIO and the local input/output line-bar LIOb drop, the input/output sense amplifier senses incorrect data. This problem becomes more significant in high-frequency products or memory apparatuses using a low power supply voltage.